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C/C++ Source or Header  |  2000-05-18  |  15KB  |  492 lines
  1. /***************************************************************************
  2.  
  3.     Atari Arcade Classics hardware (prototypes)
  4.  
  5.     driver by Aaron Giles
  6.  
  7.     Games supported:
  8.         * Arcade Classics (1992)
  9.         * Sparkz (1982)
  10.  
  11.     Known bugs:
  12.         * none at this time
  13.  
  14. ****************************************************************************
  15.  
  16.     Memory map
  17.  
  18. ****************************************************************************
  19.  
  20.     ========================================================================
  21.     MAIN CPU
  22.     ========================================================================
  23.     000000-0FFFFF   R     xxxxxxxx xxxxxxxx   Program ROM
  24.     200000-21FFFF   R/W   xxxxxxxx xxxxxxxx   Playfield RAM (512x256 pixels)
  25.                     R/W   xxxxxxxx --------      (Left pixel)
  26.                     R/W   -------- xxxxxxxx      (Right pixel)
  27.     3C0000-3C01FF   R/W   xxxxxxxx xxxxxxxx   Playfield palette RAM (256 entries)
  28.                     R/W   x------- --------      (RGB 1 LSB)
  29.                     R/W   -xxxxx-- --------      (Red 5 MSB)
  30.                     R/W   ------xx xxx-----      (Green 5 MSB)
  31.                     R/W   -------- ---xxxxx      (Blue 5 MSB)
  32.     3C0200-3C03FF   R/W   xxxxxxxx xxxxxxxx   Motion object palette RAM (256 entries)
  33.     3C0400-3C07FF   R/W   xxxxxxxx xxxxxxxx   Extra palette RAM (512 entries)
  34.     3E0000-3E07FF   R/W   xxxxxxxx xxxxxxxx   Motion object RAM (256 entries x 4 words)
  35.                     R/W   -------- xxxxxxxx      (0: Link to next object)
  36.                     R/W   x------- --------      (1: Horizontal flip)
  37.                     R/W   -xxxxxxx xxxxxxxx      (1: Tile index)
  38.                     R/W   xxxxxxxx x-------      (2: X position)
  39.                     R/W   -------- ----xxxx      (2: Palette select)
  40.                     R/W   xxxxxxxx x-------      (3: Y position)
  41.                     R/W   -------- -xxx----      (3: Number of X tiles - 1)
  42.                     R/W   -------- -----xxx      (3: Number of Y tiles - 1)
  43.     3E0800-3EFFFF   R/W   xxxxxxxx xxxxxxxx   Extra sprite RAM
  44.     640000          R     xxxxxxxx --------   Input port 1
  45.     640002          R     xxxxxxxx --------   Input port 2
  46.     640010          R     -------- xx------   Status port
  47.                     R     -------- x-------      (VBLANK)
  48.                     R     -------- -x------      (Self test)
  49.     640012          R     -------- --xx--xx   Coin inputs
  50.                     R     -------- --xx----      (Service coins)
  51.                     R     -------- ------xx      (Coin switches)
  52.     640020-640027   R     -------- xxxxxxxx   Analog inputs
  53.     640040            W   -------- x--xxxxx   Sound control
  54.                       W   -------- x-------      (ADPCM bank select)
  55.                       W   -------- ---xxxxx      (Volume)
  56.     640060            W   -------- --------   EEPROM enable
  57.     641000-641FFF   R/W   -------- xxxxxxxx   EEPROM
  58.     642000-642001   R/W   xxxxxxxx --------   MSM6295 communications
  59.     646000            W   -------- --------   32V IRQ acknowledge
  60.     647000            W   -------- --------   Watchdog reset
  61.     ========================================================================
  62.     Interrupts:
  63.         IRQ4 = 32V
  64.     ========================================================================
  65.  
  66. ****************************************************************************/
  67.  
  68.  
  69. #include "driver.h"
  70. #include "machine/atarigen.h"
  71. #include "vidhrdw/generic.h"
  72.  
  73.  
  74. WRITE_HANDLER( arcadecl_playfieldram_w );
  75.  
  76. int arcadecl_vh_start(void);
  77. void arcadecl_vh_stop(void);
  78. void arcadecl_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
  79.  
  80. void arcadecl_scanline_update(int scanline);
  81.  
  82.  
  83.  
  84. /*************************************
  85.  *
  86.  *    Interrupt handling
  87.  *
  88.  *************************************/
  89.  
  90. static void update_interrupts(void)
  91. {
  92.     int newstate = 0;
  93.  
  94.     if (atarigen_scanline_int_state)
  95.         newstate = 4;
  96.  
  97.     if (newstate)
  98.         cpu_set_irq_line(0, newstate, ASSERT_LINE);
  99.     else
  100.         cpu_set_irq_line(0, 7, CLEAR_LINE);
  101. }
  102.  
  103.  
  104. static void scanline_update(int scanline)
  105. {
  106.     /* update video */
  107.     arcadecl_scanline_update(scanline);
  108.  
  109.     /* generate 32V signals */
  110.     if (scanline % 64 == 0)
  111.         atarigen_scanline_int_gen();
  112. }
  113.  
  114.  
  115.  
  116. /*************************************
  117.  *
  118.  *    Initialization
  119.  *
  120.  *************************************/
  121.  
  122. static void init_machine(void)
  123. {
  124.     atarigen_eeprom_reset();
  125.     atarigen_interrupt_reset(update_interrupts);
  126.     atarigen_scanline_timer_reset(scanline_update, 8);
  127. }
  128.  
  129.  
  130.  
  131. /*************************************
  132.  *
  133.  *    MSM6295 I/O
  134.  *
  135.  *************************************/
  136.  
  137. static READ_HANDLER( adpcm_r )
  138. {
  139.     return (OKIM6295_status_0_r(offset) << 8) | 0x00ff;
  140. }
  141.  
  142.  
  143. static WRITE_HANDLER( adpcm_w )
  144. {
  145.     if (!(data & 0xff000000))
  146.         OKIM6295_data_0_w(offset, (data >> 8) & 0xff);
  147. }
  148.  
  149.  
  150.  
  151. /*************************************
  152.  *
  153.  *    Latch write
  154.  *
  155.  *************************************/
  156.  
  157. static WRITE_HANDLER( latch_w )
  158. {
  159.     /* bit layout in this register:
  160.  
  161.         0x0080 == ADPCM bank
  162.         0x001F == volume
  163.     */
  164.  
  165.     (void)offset;
  166.  
  167.     /* lower byte being modified? */
  168.     if (!(data & 0x00ff0000))
  169.     {
  170.         OKIM6295_set_bank_base(0, ALL_VOICES, (data & 0x80) ? 0x40000 : 0x00000);
  171.         atarigen_set_oki6295_vol((data & 0x001f) * 100 / 0x1f);
  172.     }
  173. }
  174.  
  175.  
  176.  
  177. /*************************************
  178.  *
  179.  *    Main CPU memory handlers
  180.  *
  181.  *************************************/
  182.  
  183. static struct MemoryReadAddress readmem[] =
  184. {
  185.     { 0x000000, 0x0fffff, MRA_ROM },
  186.     { 0x200000, 0x21fffe, MRA_BANK1 },
  187.     { 0x3c0000, 0x3c07ff, MRA_BANK2 },
  188.     { 0x3e0000, 0x3effff, MRA_BANK3 },
  189.     { 0x640000, 0x640001, input_port_0_r },
  190.     { 0x640002, 0x640003, input_port_1_r },
  191.     { 0x640010, 0x640011, input_port_2_r },
  192.     { 0x640012, 0x640013, input_port_3_r },
  193.     { 0x640020, 0x640021, input_port_4_r },
  194.     { 0x640022, 0x640023, input_port_5_r },
  195.     { 0x640024, 0x640025, input_port_6_r },
  196.     { 0x640026, 0x640027, input_port_7_r },
  197.     { 0x641000, 0x641fff, atarigen_eeprom_r },
  198.     { 0x642000, 0x642001, adpcm_r },
  199.     { -1 }  /* end of table */
  200. };
  201.  
  202.  
  203. static struct MemoryWriteAddress writemem[] =
  204. {
  205.     { 0x000000, 0x0fffff, MWA_ROM },
  206.     { 0x200000, 0x21fffe, arcadecl_playfieldram_w, &atarigen_playfieldram },
  207.     { 0x3c0000, 0x3c07ff, atarigen_expanded_666_paletteram_w, &paletteram },
  208.     { 0x3e0000, 0x3effff, MWA_BANK3, &atarigen_spriteram },
  209.     { 0x640040, 0x64004f, latch_w },
  210.     { 0x640060, 0x64006f, atarigen_eeprom_enable_w },
  211.     { 0x641000, 0x641fff, atarigen_eeprom_w, &atarigen_eeprom, &atarigen_eeprom_size },
  212.     { 0x642000, 0x642001, adpcm_w },
  213.     { 0x646000, 0x646fff, atarigen_scanline_int_ack_w },
  214.     { 0x647000, 0x647fff, watchdog_reset_w },
  215.     { -1 }  /* end of table */
  216. };
  217.  
  218.  
  219.  
  220. /*************************************
  221.  *
  222.  *    Port definitions
  223.  *
  224.  *************************************/
  225.  
  226. INPUT_PORTS_START( arcadecl )
  227.     PORT_START    /* 640000 */
  228.     PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
  229.     PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
  230.     PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1 )
  231.     PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
  232.     PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
  233.     PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
  234.  
  235.     PORT_START    /* 640002 */
  236.     PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
  237.     PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START2 )
  238.     PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2 )
  239.     PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
  240.     PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
  241.     PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
  242.  
  243.     PORT_START    /* 640010 */
  244.     PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_UNUSED )
  245.     PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_UNUSED )
  246.     PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_UNUSED )
  247.     PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
  248.     PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_UNUSED )
  249.     PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_UNUSED )
  250.     PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
  251.     PORT_BIT(  0x0080, IP_ACTIVE_HIGH, IPT_VBLANK )
  252.     PORT_BIT(  0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
  253.  
  254.     PORT_START    /* 640012 */
  255.     PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
  256.     PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
  257.     PORT_BIT(  0x000c, IP_ACTIVE_LOW, IPT_UNUSED )
  258.     PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_SERVICE )
  259.     PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_SERVICE )
  260.     PORT_BIT(  0xffc0, IP_ACTIVE_LOW, IPT_UNUSED )
  261.  
  262.     PORT_START    /* 640020 */
  263.     PORT_ANALOGX( 0x00ff, 0, IPT_TRACKBALL_X | IPF_REVERSE | IPF_PLAYER2, 50, 32, 0, 0, KEYCODE_UP, KEYCODE_DOWN, JOYCODE_2_UP, JOYCODE_2_DOWN )
  264.     PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
  265.  
  266.     PORT_START    /* 640022 */
  267.     PORT_ANALOG( 0x00ff, 0, IPT_TRACKBALL_Y | IPF_PLAYER2, 50, 32, 0, 0 )
  268.     PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
  269.  
  270.     PORT_START    /* 640024 */
  271.     PORT_ANALOG( 0x00ff, 0, IPT_TRACKBALL_X | IPF_REVERSE | IPF_PLAYER1, 50, 32, 0, 0 )
  272.     PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
  273.  
  274.     PORT_START    /* 640026 */
  275.     PORT_ANALOG( 0x00ff, 0, IPT_TRACKBALL_Y | IPF_PLAYER1, 50, 32, 0, 0 )
  276.     PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
  277. INPUT_PORTS_END
  278.  
  279.  
  280. INPUT_PORTS_START( sparkz )
  281.     PORT_START    /* 640000 */
  282.     PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
  283.     PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
  284.     PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1 )
  285.     PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
  286.     PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
  287.     PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER1 )
  288.     PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER1 )
  289.     PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER1 )
  290.     PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER1 )
  291.  
  292.     PORT_START    /* 640002 */
  293.     PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
  294.     PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START2 )
  295.     PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2 )
  296.     PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
  297.     PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
  298.     PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
  299.     PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
  300.     PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
  301.     PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 )
  302.  
  303.     PORT_START    /* 640010 */
  304.     PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNUSED )
  305.     PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNUSED )
  306.     PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNUSED )
  307.     PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
  308.     PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNUSED )
  309.     PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED )
  310.     PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
  311.     PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_VBLANK )
  312.     PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
  313.  
  314.     PORT_START    /* 640012 */
  315.     PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
  316.     PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
  317.     PORT_BIT( 0x000c, IP_ACTIVE_LOW, IPT_UNUSED )
  318.     PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SERVICE )
  319.     PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SERVICE )
  320.     PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED )
  321.  
  322.     PORT_START    /* 640020 */
  323.     PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
  324.  
  325.     PORT_START    /* 640022 */
  326.     PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
  327.  
  328.     PORT_START    /* 640024 */
  329.     PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
  330.  
  331.     PORT_START    /* 640026 */
  332.     PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
  333. INPUT_PORTS_END
  334.  
  335.  
  336.  
  337. /*************************************
  338.  *
  339.  *    Graphics definitions
  340.  *
  341.  *************************************/
  342.  
  343. static struct GfxLayout molayout =
  344. {
  345.     8,8,
  346.     RGN_FRAC(1,1),
  347.     4,
  348.     { 0, 1, 2, 3 },
  349.     { 0, 4, 8, 12, 16, 20, 24, 28 },
  350.     { 0*8, 4*8, 8*8, 12*8, 16*8, 20*8, 24*8, 28*8 },
  351.     32*8
  352. };
  353.  
  354.  
  355. static struct GfxDecodeInfo gfxdecodeinfo[] =
  356. {
  357.     { REGION_GFX1, 0, &molayout,  256, 16 },
  358.     { -1 } /* end of array */
  359. };
  360.  
  361.  
  362.  
  363. /*************************************
  364.  *
  365.  *    Sound definitions
  366.  *
  367.  *************************************/
  368.  
  369. static struct OKIM6295interface okim6295_interface =
  370. {
  371.     1,
  372.     { ATARI_CLOCK_14MHz/4/3/165 },    /* not verified -- assumed from Rampart */
  373.     { REGION_SOUND1 },
  374.     { 100 }
  375. };
  376.  
  377.  
  378.  
  379. /*************************************
  380.  *
  381.  *    Machine driver
  382.  *
  383.  *************************************/
  384.  
  385. static struct MachineDriver machine_driver_arcadecl =
  386. {
  387.     /* basic machine hardware */
  388.     {
  389.         {
  390.             CPU_M68000,        /* verified */
  391.             ATARI_CLOCK_14MHz,
  392.             readmem,writemem,0,0,
  393.             atarigen_video_int_gen,1
  394.         }
  395.     },
  396.     60, DEFAULT_REAL_60HZ_VBLANK_DURATION,
  397.     1,
  398.     init_machine,
  399.  
  400.     /* video hardware */
  401.     43*8, 30*8, { 0*8+4, 43*8-1-4, 0*8, 30*8-1 },
  402.     gfxdecodeinfo,
  403.     512,512,
  404.     0,
  405.  
  406.     VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK | VIDEO_SUPPORTS_DIRTY,
  407.     0,
  408.     arcadecl_vh_start,
  409.     arcadecl_vh_stop,
  410.     arcadecl_vh_screenrefresh,
  411.  
  412.     /* sound hardware */
  413.     0,0,0,0,
  414.     {
  415.         {
  416.             SOUND_OKIM6295,
  417.             &okim6295_interface
  418.         }
  419.     },
  420.  
  421.     atarigen_nvram_handler
  422. };
  423.  
  424.  
  425.  
  426. /*************************************
  427.  *
  428.  *    ROM definition(s)
  429.  *
  430.  *************************************/
  431.  
  432. ROM_START( arcadecl )
  433.     ROM_REGION( 0x100000, REGION_CPU1 )
  434.     ROM_LOAD_EVEN( "pgm0",  0x00000, 0x80000, 0xb5b93623 )
  435.     ROM_LOAD_ODD ( "prog1", 0x00000, 0x80000, 0xe7efef85 )
  436.  
  437.     ROM_REGION( 0x80000, REGION_GFX1 | REGIONFLAG_DISPOSE )
  438.     ROM_LOAD( "atcl_mob",   0x00000, 0x80000, 0x0e9b3930 )
  439.  
  440.     ROM_REGION( 0x80000, REGION_SOUND1 )
  441.     ROM_LOAD( "adpcm",      0x00000, 0x80000, 0x03ca7f03 )
  442. ROM_END
  443.  
  444.  
  445. ROM_START( sparkz )
  446.     ROM_REGION( 0x100000, REGION_CPU1 )
  447.     ROM_LOAD_EVEN( "sparkzpg.0", 0x00000, 0x80000, 0xa75c331c )
  448.     ROM_LOAD_ODD ( "sparkzpg.1", 0x00000, 0x80000, 0x1af1fc04 )
  449.  
  450.     ROM_REGION( 0x20, REGION_GFX1 | REGIONFLAG_DISPOSE )
  451.     /* empty */
  452.  
  453.     ROM_REGION( 0x80000, REGION_SOUND1 )
  454.     ROM_LOAD( "sparkzsn",      0x00000, 0x80000, 0x87097ce2 )
  455. ROM_END
  456.  
  457.  
  458.  
  459. /*************************************
  460.  *
  461.  *    Driver initialization
  462.  *
  463.  *************************************/
  464.  
  465. static void init_arcadecl(void)
  466. {
  467.     int i;
  468.  
  469.     atarigen_eeprom_default = NULL;
  470.  
  471.     for (i = 0; i < memory_region_length(REGION_GFX1); i++)
  472.         memory_region(REGION_GFX1)[i] ^= 0xff;
  473. }
  474.  
  475.  
  476. static void init_sparkz(void)
  477. {
  478.     atarigen_eeprom_default = NULL;
  479.     memset(memory_region(REGION_GFX1), 0, memory_region_length(REGION_GFX1));
  480. }
  481.  
  482.  
  483.  
  484. /*************************************
  485.  *
  486.  *    Game driver(s)
  487.  *
  488.  *************************************/
  489.  
  490. GAME( 1992, arcadecl, 0, arcadecl, arcadecl, arcadecl, ROT0_16BIT, "Atari Games", "Arcade Classics (prototype)" )
  491. GAME( 1992, sparkz,   0, arcadecl, sparkz,   sparkz,   ROT0,       "Atari Games", "Sparkz (prototype)" )
  492.